The present inventive concepts relate to semiconductor circuits, and more particularly, to a reprogramming without erase technique using capacity in multi-level NAND cells.
A NAND memory cell is a type of non-volatile memory cell, which stores information even after the power has been removed from the cell. NAND cells store a data value by charge injection into a floating gate of a transistor, which changes a threshold voltage commonly referred to as Vth. Some kinds of NAND memory cells may store multiple bits of information at the same time. For example, while a single-level cell (SLC) may only store a single bit representing one of two state levels (i.e., a logical 0 or 1), a multi-level cell (MLC) may store multiple bits. For example, an MLC may store four state levels representing a logical 0, 1, 2, or 3, which may be represented in binary code as 00, 01, 10, and 11. A triple-level cell (TLC) may store eight state levels representing a logical 0, 1, 2, 3, 4, 5, 6, or 7, which may be represented in binary code as 000, 001, 010, 011, 100, 101, 110, and 111.
Most conventional NAND devices require that the memory cells be erased each time before programming new data into the cell. Those that do not require an erase for each program nevertheless require an extra read to gather state information prior to the next write. The extra erase and read operations increase energy consumption. In addition, erase cycles cause degradation and additional wear on the memory cells, thus reducing the life of the devices.
Write amplification is another problem that is common among conventional NAND devices. Because the memory cells are erased each time before reprogramming the data values, the process to perform these operations results in moving the data values more than once. In some cases, reprogramming the data values requires an already-programmed portion of the memory to be read, updated, and written to a new location. Sometimes different portions of memory must be erased and rewritten to accommodate the new data writes. The different portions might be larger than what was originally going to be written as the new data. This has a multiplying effect that increases the number of writes required over the life of the NAND memory devices. Such churning of data shortens the time that the NAND memory devices may reliably operate.